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STEMORIA scientific instrument
Explore Boolean gates with synchronized inputs, output, logical expression, and truth-table state.
01
Manipulate
02
Measure
03
Interpret
Scientific viewport
Spatial reasoning engine
The WebGL bench and analyzer read the same event-driven circuit state. Switches drive nets, the IC resolves logic after propagation delay, and electrical mistakes surface as diagnostics.
Simulation
Discrete-event digital model
Output events are scheduled 8 ns after an input or power-state transition.
Net resolution
0 / 1 / X / Z
Floating inputs become unknown at the gate; opposing active output drivers resolve to X.
Current model time
8 ns
This first slice models one 74HC08 channel; analog thresholds and fan-out loading are not yet included.
Circuit diagnostics
electrically coherentNo floating inputs, missing power, or output contention detected in the current circuit state.